Mobile QR Code QR CODE

“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

※ The user interface design of www.jsts.org has been recently revised and updated. Please contact inter@theieie.org for any inquiries regarding paper submission.

Journal Search

  1. Home
  2. Archive
  3. JSTS 2020-06(Vol.20 No.03)
XML PDF INFO REF
Title [REGULAR PAPER] A Novel Vector-matrix Multiplication (VMM) Architecture based on NAND Memory Array
Authors (Suhyeon Kim) ; (Myung-Hyun Baek) ; (Sungmin Hwang) ; (Taejin Jang) ; (Kyungchul Park) ; (Byung-Gook Park)
DOI https://doi.org/10.5573/JSTS.2020.20.3.242
Page pp.242-248
ISSN 1598-1657
Keywords SNN; analog synapse; analog switch; neuromorphic; synaptic array
Abstract We propose a novel vector-matrix multiplication (VMM) architecture based on NAND synaptic array using a pMOSFET which is an analog switch shape cell for neural network (NN) applications. A NAND FLASH memory string is consisting of a NAND cell and a pMOSFET not to open string. A NAND cell’s resistance can be modulated by threshold voltage (Vth) depending on the amount of trapped charge when an input signal applies. If there is no input spike, a NAND cell is turned off and a pMOSFET acts as a pass gate so that only a constant voltage drop exists. Based on this NAND cell and a pMOSFET pair series, we confirm VMM operation. And inference method 1 layer fully-connected network (FCN) is implemented by circuit simulation to test 8x8 MNIST. The result of 84% recognition accuracy compared to software artificial neural networks (ANN) 86% accuracy.