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Title [REGULAR PAPER] Simplified Chip Power Modeling Methodology with Current Profile Slope Information for Display Timing Controllers
Authors (Baekseok Ko) ; (Young-Jae Min)
DOI https://doi.org/10.5573/JSTS.2020.20.5.456
Page pp.456-462
ISSN 1598-1657
Keywords Chip power model; power distribution network; current profile slope; power integrity; display timing controller
Abstract This paper presents an enhanced simplified chip power model (SCPM) based power noise estimation methodology for display timing controllers (TCONs). Compared to the state-of-the-art SCPM methodology, the proposed SCPM generation includes the current consumption profile slope information of the TCON output drivers to improve the power noise estimation accuracy in the early design stage. The SCPM-based power delivery networks are verified with the measurement results using 3D test movies. The proposed SCPM methodology is experimentally confirmed that the time-domain peak-to-peak voltage is improved by 6% and frequency-domain peak harmonics voltage by 28%, respectively.