I. INTRODUCTION

Since the introduction of the metal-oxide-semiconductor field-effect transistor (MOSFET), the dimensions of MOSFET devices have progressively decreased to enhance integration, performance, and reduce process costs ^[1-3]. However, reliability concerns such as leakage current and subthreshold swing degradation have emerged ^[4]. The operation principle of a conventional MOSFET device, depends on thermal injection, imposes a theoretical limit preventing achievement of a subthreshold swing less than 60 mV/dec ^[5]. This limitation complicates efforts to reduce the increasing leakage current associated with conventional MOSFET scaling down.

To address this challenge, researchers have proposed the development of transistor devices operating on new principles ^[6,7]. Various devices, including tunneling field-effect transistors (TFETs) utilizing tunneling effects ^[8], impact ionization metal-oxide-semiconductor field-effect transistors (IMOS) with avalanche breakdown ^[9], and feedback field-effect transistors (FBFETs) applying the feedback effect of electrons and holes in a channel, have been introduced ^[10]. Among these, the feedback field-effect transistor exhibits a small subthreshold swing (SS) close to 0 mV/dec and a substantial on-current (I$_{\mathrm{ON}}$) ^[11]. FBFETs also find application in various electronic devices owing to their hysteresis and charge accumulation characteristics ^[12]. FBFETs operate through a positive feedback loop, where electrons and holes in the channel region modulate the energy state of the potential barrier ^[13].

Upon change of the gate voltage in the FBFET device, the initiation of a positive feedback loop within the channel is triggered by the movement of charge carriers. Consequently, FBFETs demonstrate a notably high I$_{\mathrm{ON}}$ and an exceptionally low SS when compared to conventional MOSFET devices. The exploration and investigation of FBFETs to utilize these advantageous characteristics have recently become a subject of extensive research ^[10-13].

While the switching behavior characteristics of FBFETs have been introduced, a specific analysis of their high-temperature operation has not been provided in detail. The operational characteristics of semiconductor devices at high temperatures represent a crucial aspect due to potential heating issues, or under elevated temperature conditions. For instance, the increase of electric vehicle market relies on the use of over 1,000 semiconductor chips per vehicle ^[14]. Among these, semiconductor chips for engine control units (ECUs), power converters, etc., must function in high-temperature environments, reaching around 200 $^{\circ}$C. A comprehensive understanding of the high-temperature characteristics of FBFETs is necessary to broaden their application scope ^[15,16].

In this paper, we investigate the high-temperature characteristics of FBFETs using technology computer-aided design (TCAD) simulations. This paper involves the observation of the characteristics of a double-gate FBFET device in response to temperature variations from 300 K to 400 K, achieved through systematic parameter adjustments, followed by a comprehensive analysis of the temperature-dependent characteristics.

II. DEVICE STRUCTURE

The device structure of the FBFET is illustrated in Fig. 1, featuring a double-gate configuration with both p-type and n-type polysilicon. This study utilizes the Silvaco TCAD simulator to acquire the electrical characteristics of FBFETs. The double-gate FBFET employed for implementing the feedback mechanism consists of a source, control gate, fixed gate, and drain. In this device structure, a positive bias is applied to both the control gate and the fixed gate. This bias induces the flow of carriers from the source area to the channel, initiating a positive feedback mechanism. The bias applied to the fixed gate remains constant during operation and establish the energy barrier within the FBFET.

Various models were implemented in the TCAD simulation to extract the electrical characteristics. The device models and associated parameters encompass Shockley-Read-Hall (SRH) recombination, surface SRH models for each interface, and mobility-like Auger recombination. Table 1 presents the operational parameters of the FBFET device. In Fig. 2, transfer characteristics of FBFETs are depicted, highlighting crucial electrical parameters. V$_{\mathrm{ON}}$ is defined as the control gate voltage when the device transitions from the off state to the on state ^[17,18], and it is set to 0.5 V. I$_{\mathrm{ON}}$ is defined as the drain current when the device switches from the off state to the on state ^[17,18], while I$_{\mathrm{OFF}}$ is defined as the least drain current in the off state ^[17,18].

Fig. 1. Proposed architecture of double-gate feedback field-effect transistor.

Fig. 2. Simulated I$_{D}$ - V$_{CG}$ of FBFET. The device parameters of the device are summarized in Table 1.

III. RESULT & DISCUSSION

Figure 3 depicts the energy band diagram of a double-gate FBFET along the channel direction. The N+ source is grounded, and the P+ drain is positively biased (V$_{\mathrm{D}}$ = 0.9 V). Additionally, the fixed gate is positively biased (V$_{\mathrm{FG}}$ = 0.7 V) to establish energy barriers in L$_{\mathrm{G2}}$ regions. In Fig. 3(a), it is evident that the control gate is biased negatively to create potential barriers in L$_{\mathrm{G1}}$ regions. These energy barriers effectively obstruct the movement of holes and electrons. The electron-trapped barrier and hole-trapped barrier function as potential barriers, trapping charges in the source and drain to prevent the injection of electrons and holes into the channel ^[19]. In this configuration, the FBFET behaves as an N+ PNP+ structure, typically in the OFF state. Fig. 3(b) illustrates that, with an increasing V$_{\mathrm{CG}}$, the energy barrier undergoes a sudden collapse. As the externally applied gate voltage gradually rises, electrons from the source surpass the electron-trapped barrier, accumulating in the electron-trapped potential well. This, in turn, collapses the hole-trapped barrier, allowing holes to traverse the channel towards the source and accumulate in the hole-trapped potential well. Consequently, this process reduces the height of the hole-trapped potential well and the electron-trapped barrier, facilitating a greater flow of electrons into the channel. This positive feedback mechanism results in the activation of the FBFET, achieving a switched-on state. Consequently, the feedback mechanism enables the achievement of a steep switching characteristic.

Steep switching characteristics are examined across a range of operating temperatures. In Fig. 4, the transfer characteristics of the device are presented with previously noted parameters, varied from 300 K to 400 K. As the temperature rises, V$_{\mathrm{ON}}$ decreases, and both I$_{\mathrm{ON}}$ and I$_{\mathrm{OFF}}$ exhibit an increase. Specifically, as the temperature ascends from 300 K to 400 K, I$_{\mathrm{ON}}$ escalates from 10$^{-6}$ A/${\mu}$m to 10$^{-5}$ A/${\mu}$m, accompanied by a more pronounced increase in I$_{\mathrm{OFF}}$, varied from 10$^{-14}$to 10$^{-11}$ A/${\mu}$m.. As the temperature increases, a number of electron-hole pairs (EHP) are generated through thermal processes. Consequently, at higher temperatures, the quantity of carriers capable of diffusing beyond the energy band increases in comparison to lower temperatures. Finally, both I$_{\mathrm{OFF}}$ and I$_{\mathrm{ON}}$ exhibit an increase with escalating temperatures.

In Fig. 5, it is observed that with increasing temperature, both I$_{\mathrm{ON}}$ and I$_{\mathrm{OFF}}$ exhibit an upward trend, with the increase in I$_{\mathrm{OFF}}$ surpassing that of I$_{\mathrm{ON}}$. This asymmetric change in current leads to a degradation of the I$_{\mathrm{ON}}$/I$_{\mathrm{OFF}}$ current ratio. Regarding V$_{\mathrm{ON}}$, it experiences an elevation at lower temperatures due to the increased difficulty of carriers in overcoming the barrier. As V$_{\mathrm{ON}}$ holds a similar significance to the threshold voltage in MOSFETs, circuit designers working with FBFETs should account for the temperature-dependent variation in V$_{\mathrm{ON}}$.

Fig. 6(a) shows two energy barriers in the channel region for blocking the injection of charge carriers at 300 K and 400 K ^[2]. There is significant difference in energy barrier. This difference caused by hole concentration difference as shown in Fig. 6(b)\textcolor{color-1}{.} With the temperature increasing from 300 K to 400 K, electron-hole pairs are generated due to heightened thermal energy. It is evident that hole concentrations increased within the range of 0.025 ${\mu}$m to 0.075 ${\mu}$m, coinciding with a reduction in the energy band height. As illustrated in the Fig. 6(a), the concentration of holes formed through Electron-Hole Pairs (EHP) exhibits a more pronounced impact on the change in the energy band within the range of 0.025 ${\mu}$m to 0.075 ${\mu}$m compared to the concentration of electrons. The increased hole concentration leads to an increase in positive charge within this region. Consequently, the height of the barrier decreases at 400 K. This reduction in barrier height influences the movement of electrons from the source over the barrier, resulting in a I$_{\mathrm{ON}}$ increase.

In Fig. 7(a) and (b), transfer characteristics are presented with V$_{\mathrm{DS}}$ set at 0.8 V and 1.0 V, respectively, at temperatures of 300 K and 400 K. A comparison between Fig. 7(a) and (b) reveals an increase in I$_{\mathrm{OFF}}$ as the temperature rises from 300 K to 400 K. When examining drain voltages of 0.8 V and 1.0 V, it becomes apparent that higher drain voltages correspond to higher I$_{\mathrm{ON}}$ values. This increase in I$_{\mathrm{ON}}$ is attributed to the enhanced velocity of carriers at a V$_{\mathrm{DS}}$ of 1.0 V, where the energy band exhibits a lower barrier compared to a V$_{\mathrm{DS}}$ of 0.8 V, as illustrated in Fig. 7(c). Additionally, the escalation in I$_{\mathrm{OFF}}$ is a consequence of the diminished barrier between the source and the channel.

Fig. 8 incorporates the variations in crucial parameters of the FBFET concerning changes in both drain voltage and temperature. For I$_{\mathrm{OFF}}$ and I$_{\mathrm{ON}}$, linear characteristics are evident with respect to the drain voltage, while only V$_{\mathrm{ON}}$ displays nonlinear characteristics. The I$_{\mathrm{ON}}$ and I$_{\mathrm{OFF}}$ outcomes indicate a considerable shift in the current range of the device. Additionally, with the change in voltage polarity in the case of V$_{\mathrm{ON}}$, it becomes possible to anticipate the usable temperature range when applying FBFETs in a circuit.

In Fig. 9, the transfer characteristics were observed with respect to the variation in the fixed gate voltage at both 300 K and 400 K. Figure 9(a) and (b) reveal that as the fixed gate voltage increases, the I$_{\mathrm{OFF}}$ decreases, and V$_{\mathrm{ON}}$ increases; however, I$_{\mathrm{ON}}$ exhibits minimal change. Even though the fixed gate is essential for establishing the potential barrier in the FBFET, I$_{\mathrm{ON}}$ remains relatively constant when the fixed gate voltage is changed. Figure 9(c) demonstrates that as V$_{\mathrm{FG}}$ is increased at 300 K, the height of the potential barrier increases. This phenomenon results in changes to V$_{\mathrm{ON}}$ and I$_{\mathrm{OFF}}$ when V$_{\mathrm{FG}}$ is modified. The increased potential barrier prevents the movement of carriers, leading to a decrease in I$_{\mathrm{OFF}}$ and an increase in V$_{\mathrm{ON}}$.

Fig. 3. Energy band diagram of FBFET under V$_{DS}$ = 0.9 V and V$_{FG}$ = 0.7 V: (a) V$_{CG}$ = -1.0 V; (b) V$_{CG}$ = 1.5 V. the energy barrier is collapsed by the positive feedback mechanism.

Fig. 4. Transfer characteristics of double-gate FBFET with various temperature (300 K ~ 400 K).

Fig. 5. (a) Simulated I$_{ON}$ and I$_{OFF}$; (b) V$_{ON}$ for various temperatures from 300 to 400 K.

Fig. 6. (a) Energy band diagram; (b) Hole concentration; (c) Electron concentration at 300 K and 400 K.

Fig. 7. Simulated V$_{CG}$ - I$_{D}$ for V$_{DS}$ = 0.8 V and V$_{DS}$ = 1.0 V at (a) 300 K; (b) 400 K; (c) energy band diagram at 300 K for V$_{DS}$ = 0.8 V and V$_{DS}$ = 1.0 V.

Fig. 8. Electrical characteristics with temperature and VD variations: (a) I$_{OFF}$; (b) I$_{ON}$; (c) V$_{ON}$.

Fig. 9. Simulated V$_{CG}$ _ I$_{D}$ for V$_{FG}$ = 0.6 V and V$_{FG}$ = 0.8 V at (a) 300 K; (b) 400 K; (c) represents the energy band diagram at 300 K for V$_{FG}$ = 0.8 V and V$_{FG}$ = 0.6 V.

IV. CONCLUSIONS

In this study, the high-temperature characteristics of FBFET were investigated using TCAD simulation, comprehensively exploring various aspects of high-temperature operation. The I$_{\mathrm{ON}}$ at 400 K exhibited an increase from 10$^{-6}$ to 10$^{-4}$ by elevating V$_{\mathrm{DS}}$ from 0.8 V to 1.0 V. Simultaneously, the I$_{\mathrm{OFF}}$ at 400 K demonstrated a decrease from 10$^{-9}$ A/${\mu}$m to 10$^{-11}$ A/${\mu}$m by increasing V$_{\mathrm{FG}}$ from 0.6 V to 0.8 V, thereby enhancing the device's performance.

Subsequently, we assessed the device's performance in relation to temperature changes. V$_{\mathrm{ON}}$ decreased from 0.4 V at 300 K to -0.8 V at 400 K. Furthermore, the on/off ratio declined from 10$^{8}$ at 300 K to 10$^{6}$ at 400 K. Despite this performance degradation, it was confirmed that the device remains operational at elevated temperatures. The operational characteristics of the device were modulated at high temperatures through adjustments in V$_{\mathrm{DS}}$ and V$_{\mathrm{FG}}$. It was also established that the desired specifications could be achieved through such voltage modifications, particularly at high temperatures.