1. Selection of target - Double side cooling power module

Simulation was conducted using Infineon's double side cooling (DCS) module that can utilize metal contact area and allowing heat to dissipate in both directions. It can effectively manage thermal loads and enhances by reducing electrical parasitic such as resistance and inductance. The DSC model was selected for simulation due to its compatibility with EMC, providing effective thermal management and SiC-based power semiconductor modules have superior thermal management capabilities that help minimizing warpage issues in high temperature. These symmetrical cooling feature helps distribute thermal loads more evenly, preventing localized hotspots that could otherwise lead to increased warpage.

The model was designed based on the open-source layout of FF450R08A03P2 module from Infineon ^[8]. Overall shape of the module was built including power pins and cooling plates. The number of pins and connections followed the standard IGBT module format. By the reason that internal model source inside the package was not provided to public, this study referred to the datasheet description and inferred whole package design including metal components for the cooling system that enhances thermal performance and their cooling systems. Thermal resistance from junction to case is listed as 0.090 K/W and the thermal resistance from case to heatsink is 0.100 K/W. These values make heat dissipation more effectively and allow module to operate reliably at a maximum junction temperature of $175^\circ$C. Furthermore, we referred the thickness and size of the metal cooling plates to $2 \sim 3$ mm from these thermal resistance values. Their surface area was scaled to cover the entire module to maximize heat spread. As a result, this study designed the module that can run a simulation under high-temperature environments by efficiently managing the heat.

Fig. 1. Infineon's DSC model and cross-sectional view.

2. Selection of Epoxy Molding Compounds (EMCs) and Analysis of Curing Kinetics

In this study, warpage analysis under the various properties of epoxy molding compound was conducted. Properties of EMCs were selected both considering by comparison of thermal conductivity between other EMCs and coefficients of thermal linear expansion between EMC and chips that can influence warpage simulation. These properties may impact warpage in various ways and must be considered comprehensively for accurate prediction. Higher thermal conductivity leads to even temperature distribution, reducing localized thermal expansion and minimizing warpage. Consequently, lower thermal conductivity can lead to temperature differences that can cause localized expansion and warpage increase. Additionally, when the CTE of EMC is higher than the chip or substrate, EMC will be expanded more while the temperature increases, applying thermos-mechanical stress to the package ^[9]. During cooling process, EMC will also shrink more, leads to warpage. So, smaller CTE differences reduces thermal stress, ultimately leads to successful warpage reduction.

Before conducting warpage simulation, selection of EMCs has undergone by checking curing kinetics of them. Fig. 2. shows that the comparison between EMC A and B of the initial temperature of curing, also illustrates the total time for fully solidification. EMC A begins curing at approximately $104.2^\circ$C and exhibits a rapid conversion rate, takes 9 secs for fully converted. In the curing process, most EMCs have short curing time at high temperatures that can accelerate molding, reducing the exposure time of high temperature ^[10,11]. This property can minimize thermal stress during molding. As Fig. 2. shows that EMC A has a fast curing process than B, which can achieve both reducing the generation of thermal stress, consequently reduces warpage. Also, the shorter curing time decrease exposure to increased temperatures, reducing risk of warpage caused by thermal expansion mismatches.

In contrast, EMC B starts curing at a higher temperature of $135.7^\circ$C and follows a more gradual conversion process. While the full conversion of curing time of 10.74 second is slower than EMC A, it can lead to increased thermal stress and greater exposure to high temperatures. If the temperature distribution is uneven particularly in cases where heat dissipation is not uniform, may result in different thermal expansion between the center and the outer regions of the package, contributing to increased warpage. However, shorter curing times are not always advantageous. Excessively short curing can leave the EMC partially cured, reducing its ability to dissipate thermal stress effectively. Conversely, overly long curing times may cause excessive shrinkage, leading to increased warpage. Thus, determining an optimal curing time is crucial, considering the properties of the EMC and the specific characteristics of the simulation module ^[12].

This study's objective is to compare warpage with different EMC's properties, so EMC A was chosen to see how it advantageous for reducing warpage which has lower curing temperature and proper curing rate.

Fig. 2. Curing kinetics of EMCs.

1. Case study 1: Dependency of material properties

In this experiment, we select EMC materials with high thermal conductivity and similar CTE to silicon substrate, which is the most crucial factor contributing to warpage. Considering this and other important characteristics, EMC-A was selected as the most suitable material for comparison with other EMCs ^[13].

As mentioned before, this study chooses two important factors: thermal conductivity, coefficient of linear thermal expansion (CTLE) ^[14]. High thermal conductivity of EMC facilitates uniform heat dissipation, contributing to the stabilization of temperature of DSC model ^[15]. Similarity in CLTE of the silicon substrate and EMC can minimize the differences in thermal expansion between the two materials ($\text{CLTE}_{\rm Si} = 2.6\times10^{-6}$ [l/K]).

Among the factors analyzed, the CTE mismatch between EMC and silicon was found to have the largest impact on warpage under our simulation conditions. This mismatch induces substantial thermo-mechanical stress during temperature changes, leading to deformation. While thermal conductivity contributes to heat dissipation and reduces localized thermal expansion, and molding temperature affects shrinkage during curing, their overall influence is secondary compared to the stress caused by the CTE mismatch.

In conclusion, the comparison between EMC A, characterized by high ductility, thermal conductivity, compressibility, and viscoelastic coefficients with rapid curing kinetics, and EMC B, which exhibits relatively unfavorable characteristics, revealed significant differences in warpage.

The maximum partial warpage increased from 0.207mm to 0.230mm when comparing from EMC-A (demonstrated as red) with EMC-B (demonstrated as blue) with the average warpage increasing by more than 29.3% (0.099 mm to 0.128 mm). EMC-A's epoxy material resulted in substantially lower warpage compared to others, indicating superior performance. Fig. 3 compares the distribution of warpage in a DSC power module molded with either EMC A or EMC B. Both the magnitude and distribution of warpage differ between the two EMCs. The simulated warpage is further compared in Fig. 4. The EMC-A molded module primarily bends at its two ends, i.e., the metal pads and pins, while the EMC-B molded module mostly bends at the corners of the mold. While we use EMC-A as an encapsulation component, with its higher thermal conductivity, effectively disperses heat around the device, reducing warpage in external areas and maintaining stability in chip central regions. Conversely EMC-B, with lower thermal conductivity, may lead to heat accumulation within the chip's central region, increasing the likelihood of warpage.

Fig. 3. Warpage distribution comparison between EMC-A and EMC-B.

Fig. 4. Warpage comparison of DSC power models molded with EMC A (left), B (right) with extension directions (red arrow).

2. Case study 2: Module structure integration

It was demonstrated that warpage can be reduced by approximately 29% by selecting appropriate EMC materials, particularly those with high thermal conductivity and low CTE. This reduction in warpage due to EMC material properties was anticipated in previous works. In addition to selecting the right EMC, this work proposes an additional approach of modifying the power module structure as a preliminary study.

One preliminary design is depicted in Fig. 5. Cylindrical pins are commonly used in direct cooling structures, such as those in direct double-sided cooling (DSC) modules ^[16]. In conventional direct DSC modules, these pins are attached to the contacting surface of heat sinks, which are the exposed surfaces of the direct bonded copper (DBC) substrates. Thus, the cooling pins do not contact the EMC encapsulation. However, our proposed design encloses the cooling pins within the EMC material.

There are two major expectations from the proposed approach. The first is enhanced thermal conductance, similar to the concept of carbon nanotube (CNT)-based composites ^[17]. In a conventional DSC module, heat generated from the power chip is dissipated sequentially through the substrate, TIM, EMC, and finally through the cooling pins. In contrast, the proposed design embeds the cooling pins within the EMC. This embedded cylindrical structure increases the surface area, potentially enhancing heat dissipation. Moreover, since copper has a significantly higher thermal conductivity (approximately 400W/mK) than that of EMC, the copper-pin encapsulation can achieve better thermal conductivity. The second hypothesis is that the cylindrical pins can function as supporting pillars, enhancing mechanical properties similarly to the increased Young's modulus observed with CNTs ^[18], which is expected to improve mechanical resistance to shrinkage.

Simulation results in Fig. 5 demonstrate a reduction in warpage compared to the selected EMC case in Subsection 4.1. The average warpage is reduced by approximately 10%, from 0.099 to 0.090. For simulation convenience, the spacer is not included, and the DBC substrates were simplified herein.

Fig. 5. Warpage simulation result of the proposed preliminary design with cooling pins embedded in EMC.