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“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

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References

1 
G. Bi and M. Poo, “Synaptic Modifications in Cultured Hippocampal Neurons: Dependence on Spike Timing, Synaptic Strength, and Postsynaptic Cell Type,” J. Neurosci., vol. 18, no. 24, pp. 10464-10472, Dec. 1998.DOI
2 
N. Brunel, “Dynamics of Sparsely Connected Networks of Excitatory and Inhibitory Spiking Neurons,” J. Comput. Neurosci., vol. 8, no. 3, pp. 183-208, May 2000.DOI
3 
R. Brette et al., “Simulation of networks of spiking neurons: a review of tools and strategies,” J. Comput. Neurosci., vol. 23, no. 3, pp. 349-398, Dec. 2007.DOI
4 
S. Song, et al, “Competitive Hebbian learning through spike-timing-dependent synaptic plasticity,” Nat. Neurosci., vol. 3, no. 9, Art. no. 9, Sep. 2000.DOI
5 
M. Mikaitis, et al, “Neuromodulated Synaptic Plasticity on the SpiNNaker Neuromorphic System,” Front. Neurosci., vol. 12, 2018.DOI
6 
Bodo Rueckauer, et al, “Conversion of Continuous-Valued Deep Networks to Efficient Event-Driven Networks for Image Classification,” Front. Neurosci., vol. 11, 2017.DOI
7 
S. Kim, et al, “Spiking-YOLO: Spiking Neural Network for Energy-Efficient Object Detection,” Proc. AAAI Conf. Artif. Intell., vol. 34, no. 07, Art. no. 07, Apr. 2020.DOI
8 
J. H. Lee, et al, “Training Deep Spiking Neural Networks Using Back-propagation,” Front. Neurosci., vol. 10, 2016.DOI
9 
Y. Wu, et al, “Direct training for spiking neural networks: faster, larger, better,” in Proceedings of the Thirty-Third AAAI Conference on Artificial Intelligence and Thirty-First Innovative Applications of Artificial Intelligence Conference and Ninth AAAI Symposium on Educational Advances in Artificial Intelligence, pp. 1311-1318, Jan. 2019.DOI
10 
W. Zhang and P. Li, “Temporal spike sequence learning via backpropagation for deep spiking neural networks,” in Proceedings of the 34th International Conference on Neural Information Processing Systems, pp. 12022-12033, Dec. 2020.URL
11 
F. Akopyan, et al., “TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip,” IEEE Trans. Comput.Aided Des. Integr. Circuits Syst., vol. 34, no. 10, pp. 1537-1557, Oct. 2015.DOI
12 
M. Davies, et al., “Loihi: A Neuromorphic Manycore Processor with On-Chip Learning,” IEEE Micro, vol. 38, no. 1, pp. 82-99, Jan. 2018.DOI
13 
G. K. Chen, et al, “A 4096-Neuron 1M-Synapse 3.8-pJ/SOP Spiking Neural Network With On-Chip STDP Learning and Sparse Weights in 10-nm FinFET CMOS,” IEEE J. Solid-State Circuits, vol. 54, no. 4, pp. 992-1002, Apr. 2019.DOI
14 
S. K. Esser, et al., “Convolutional networks for fast, energy-efficient neuromorphic computing,” Proc. Natl. Acad. Sci., vol. 113, no. 41, pp. 11441-11446, Oct. 2016.DOI
15 
S. Narayanan, et al, “SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks,” in 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA) , pp. 349-362, May 2020.DOI
16 
J.-J. Lee, et al, “Parallel Time Batching: Systolic-Array Acceleration of Sparse Spiking Neural Computation,” in 2022 IEEE International Sympo-sium on High-Performance Computer Architecture (HPCA), pp. 317-330, Apr. 2022.DOI
17 
Y.-H. Chen, et al, “Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks,” in 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), pp. 367-379, Jun. 2016.DOI
18 
A. Paszke, et al., “PyTorch: an imperative style, high-performance deep learning library,” in Proceedings of the 33rd International Conference on Neural Information Processing Systems, pp. 8026-8037, 2019.URL
19 
Y. Kuang, et al., “A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS,” IEEE Trans. Circuits Syst. II Express Briefs, vol. 68, no. 7, pp. 2655-2659, Jul. 2021.DOI
20 
J. Tandon, et al, “The OpenRISC processor: open hardware and Linux,” Linux J., vol. 2011, no. 6, Dec. 2011.URL
21 
E. M. Izhikevich, “Simple Model of Spiking Neurons”, IEEE Trans. on Neural Networks, vol. 14, no. 6, pp. 1569-1572, Nov. 2003.DOI
22 
A. L. Hodgkin and A. F. Huxley, “A quantitative description of membrane current and its application to conduction and excitation in nerve”, The J. of Physiology, vol. 117, pp. 500-544, Aug. 1952.DOI
23 
A. Basu, L. Deng, C. Frenkel and X. Zhang, "Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions," 2022 IEEE Custom Integrated Circuits Conference (CICC), pp. 1-8, 2022.DOI