I. INTRODUCTION

One of the main factors limiting the further scaling of ultra-small complementary metal-oxide-semiconductor (CMOS) devices is the excessive power consumption density in an integrated circuit. To explore low-power nanoscale devices, a negative-capacitance field effect transistor (NCFET) was first proposed by Salahuddin and Datta in 2008 ^[1]. The NCFET achieves a low-power target by breaking through the Boltzmann thermodynamic limit. Owing to the HfO$_{2}$-based ferroelectric materials, NCFETs are easily compatible with the standard nanometre-scale CMOS process. Therefore, NCFETs have attracted significant attention and are among the most promising candidates for Internet-of-Things applications with super steep subthreshold swings (SSs) ^[2-5].

In recent years, fin field effect transistors (FinFETs) have been utilised as baseline devices in the fabrication of negative-capacitance fin field-effect transistors (NC-FinFETs) ^[6-8]. Owing to an internal voltage amplification, NC-FinFETs provide many dominant characteristics compared with conventional FinFETs, including a higher on-state current ($I_{\mathrm{ON}}$), lower off-state current ($I_{\mathrm{OFF}}$), and improved short-channel effects (SCEs), such as drain-induced barrier lowering (DIBL) ^[9-11].

However, thus far, the investigated FinFETs have been considered to have ideal rectangular fins, whereas their actual shapes when fabricated are trapezoidal, as seen from microscope cross-sectional images of FinFETs ^[12]. The trapezoidal FinFET has a fin top width (W$_{\mathrm{Fin,Top}}$) shorter than its bottom width (W$_{\mathrm{Fin,Bot}}$). Owing to the limitations of the etching technique, the angle between the side and bottom of the fin is similar to that of a trapezoidal shape. It has been proven that the fin shape significantly influences the SCE and radio frequency/analogue performance of conventional FinFETs ^[13-16]. However, with the negative capacitance (NC) effect, the impact of the trapezoidal fin shape on the NC-FinFET performance is not yet clearly understood. Therefore, this is addressed in the present study.

The remainder of this paper is organised as follows. The device structures, simulation model, and different design parameters are described in Section 2. In Section 3, the simulation results are detailed and analysed. Finally, conclusions are presented in Section 4.

II. DEVICE PARAMETERS AND SIMULATION METHODS

A 3D schematic of the proposed NC-FinFET with a trapezoidal fin shape is presented in Fig. 1(a); Fig. 1(b) compares the rectangular and trapezoidal cross-sectional views of the fin. The profile of the trapezoidal fin in Fig. 1(b) is more consistent with the shape of the fin in actual manufacturing ^[17].

The relevant parameters of the device are listed in Table 1. To investigate the effects of different fin shapes, we varied W$_{\mathrm{Fin,Top}}$ from 2 to 6 nm at a fixed W$_{\mathrm{Fin,Bot}}$ of 6~nm. The work function of the metal gate material is 4.5~eV. The source/drain (S/D) and channel were uniformly doped with arsenic and boron, and their doping concentrations are listed in Table 1. Higher doping in the S/D region is beneficial for reducing the parasitic resistance of the S/D extension region ^[18]. The device I$_{\mathrm{ds}}$-V$_{\mathrm{gs}}$ curves of the baseline FinFET was calibrated with the experimental data ^[19], as is shown in Fig. 2.

The NC-FinFET comprises a ferroelectric layer on the top of the interfacial oxide at the baseline FinFET gate stack, and its 1 MV/cm coercive field (E$_{\mathrm{c}}$) and 5 ${\mu}$C/cm$^{2}$ remnant polarization (P$_{\mathrm{r}}$) fit the parameter ranges in HfO$_{2}$-based ferroelectric materials ^[20-21]. The relationship between the electric field and polarization in a ferroelectric material is described using the following Landau-Khalatnikov (L-K) equation ^[22]:

where $\alpha =-3\sqrt{3}/4\times E_{\mathrm{c}}/P_{\mathrm{r}},$ $\beta =3\sqrt{3}/8\times E_{\mathrm{c}}/{P_{\mathrm{r}}}^{3},$ $\gamma =5\times 10^{25}\mathrm{cm}^{9}/(\mathrm{FC}^{4})$ and ${\rho}$=2.25${\times}$10$^{4}$ ${\Omega}$.cm are the material-dependent parameters of the ferroelectric.

In the simulation, we used the Poisson and continuity equations to solve self-consistently with the L-K equation. The Shockley-Read-Hall and Auger models were used to account for leakage currents that exist owing to a thermal generation. A high electric field injection model can cause bandgap narrowing; thus, the old Slotboom model of bandgap narrowing was also considered. For the strong inversion regime, Fermi-Dirac statistics were employed to improve the simulation accuracy. In addition, because the device dimensions are extremely small, some quantum modification terms (eQuantumPotential) were added. The high-field saturation, doping-dependent mobility, and mobility degradation at the interfaces were also used during the simulation.

Fig. 1. (a) Three-dimensional (3D) schematic view of NC-FinFET; (b) Cross-sectional views of NC-FinFET showing the variation in the W$_{\mathrm{Fin,Top}}$.

Fig. 2. Comparison of I$_{\mathrm{ds}}$-V$_{\mathrm{gs}}$ curve between the baseline FinFET and experimental data[19].

III. RESULTS AND ANALYSIS

The control of W$_{\mathrm{Fin,Top}}$ is critical to the SCEs, and a narrow fin width reduces the leakage current. Therefore, a comprehensive comparison of the effects of W$_{\mathrm{Fin,Top}}$ from 6 to 2 nm on the electrical behaviour of an NC-FinFET was conducted, with the bottom fin width fixed at 6 nm.

Fig. 3 displays the transfer characteristic curves (I$_{\mathrm{ds}}$-V$_{\mathrm{gs}}$) of the NC-FinFET and FinFET (T$_{\mathrm{FE}}$ = 0) with different W$_{\mathrm{Fin,Top}}$ values. As W$_{\mathrm{Fin,Top}}$ decreases, $I_{\mathrm{ON}}$ decreases slightly, but $I_{\mathrm{OFF}}$ significantly decreases, implying that the improvement of $I_{\mathrm{OFF}}$ is at the expense of $I_{\mathrm{ON}}$. The main reason for this is that when W$_{\mathrm{Fin,Top}}$ decreases, the series resistance of the channel will increase as the effective fin width (W$_{\mathrm{eff}}$) decreases ^[13]:

By comparing the I$_{\mathrm{ds}}$-V$_{\mathrm{gs}}$ curves shown in Fig. 3, the NC-FinFET demonstrates an improved $I_{\mathrm{ON}}$ and a reduced $I_{\mathrm{OFF}}$. Thus, the NC-FinFET achieves a better switching current than the FinFET.

The I$_{\mathrm{ds}}$-V$_{\mathrm{gs}}$ characteristics of the NC-FinFET at different T$_{\mathrm{FE}}$ values are presented in Fig. 4. As T$_{\mathrm{FE}}$ increased, $I_{\mathrm{OFF}}$ of the device decreased, and $I_{\mathrm{ON}}$ increased. This is because when the gate voltage is below the flat-band voltage (V$_{\mathrm{gs}}$ < V$_{\mathrm{fb}}$), the device operates in the depletion region. The channel surface potential decreases with an increase in T$_{\mathrm{FE}}$, indicating that the NC effect suppresses the surface potential. In addition, the movable electron charge density in the channel |Q$_{\mathrm{m}}$| (Q$_{\mathrm{m}}$ < 0) decreases with an increase in T$_{\mathrm{FE}}$; thus, I$_{\mathrm{ds}}$ decreases with an increase in T$_{\mathrm{FE}}$. When the gate voltage exceeds the flat band voltage (V$_{\mathrm{gs}}$ > V$_{\mathrm{fb}}$), the device operates within the accumulation region. The channel surface potential increases with an increase in T$_{\mathrm{FE}}$ and is amplified by the NC effect ^[23]. In this case, |Q$_{\mathrm{m}}$| increases with an increase in T$_{\mathrm{FE}}$. Specifically, I$_{\mathrm{ds}}$ increases as T$_{\mathrm{FE}}$ increases.

The introduction of the NC effect increases the total equivalent capacitance, resulting in an improved gate control ability of the channel; thus, the NC-FinFET achieves a lower $I_{\mathrm{OFF}}$ and higher $I_{\mathrm{ON}}$ simultaneously. According to the capacitance matching, under the condition of maintaining |C$_{\mathrm{FE}}$| > C$_{\mathrm{MOS}}$, as T$_{\mathrm{FE}}$ increases, the smaller the ferroelectric capacitance (|C$_{\mathrm{FE}}$| is closer to C$_{\mathrm{MOS}}$), the better the capacitance matching, and the larger the NC effect. However, as T$_{\mathrm{FE}}$increases, the ferroelectric capacitance decreases to |C$_{\mathrm{FE}}$| < C$_{\mathrm{MOS}}$, and the NC-FinFET exhibits hysteresis ^[22].

The variation in the threshold voltage (V$_{\mathrm{th}}$) with W$_{\mathrm{Fin,Top}}$ is shown in Fig. 5. It is apparent that V$_{\mathrm{th}}$ increases as W$_{\mathrm{Fin,Top}}$ decreases because V$_{\mathrm{th}}$ is affected by the narrow fin width ^[24]. This is validated by the electron density distribution for different W$_{\mathrm{Fin,Top}}$ values, as shown in Fig. 6. The electron density distribution of the trapezoidal fin was more uniform than that of the rectangular fin. Under the same W$_{\mathrm{Fin,Top}}$, the electron density of the NC-FinFET is higher than that of its FinFET counterpart. As the electron density increases across the fin, V$_{\mathrm{th}}$ increases ^[13]. Therefore, V$_{\mathrm{th}}$ of the NC-FinFET increases with a decrease in W$_{\mathrm{Fin,Top}}$.

Fig. 7 shows the potential energy and electrostatic potential distributions of the device along the channel as W$_{\mathrm{Fin,Top}}$ varies. In the sub-threshold region (V$_{\mathrm{gs}}$ < V$_{\mathrm{th}}$), a narrow W$_{\mathrm{Fin,Top}}$ causes a decrease in the electrostatic potential in the channel, resulting in an increase in the potential barrier allowing electrons in the source region to spread into the channel. Therefore, V$_{\mathrm{th}}$ increases as W$_{\mathrm{Fin,Top}}$ becomes narrower. Fig. 8 shows the potential energy and electrostatic potential distributions along the channel at different T$_{\mathrm{FE}}$ values. As T$_{\mathrm{FE}}$ increases, the electrostatic potential of the device decreases, whereas the potential energy increases. Therefore, V$_{\mathrm{th}}$ increases as T$_{\mathrm{FE}}$ increases.

Fig. 9 and 10 depict the $I_{\mathrm{OFF}}$ and $I_{\mathrm{ON}}$ results of the device as T$_{\mathrm{FE}}$ and W$_{\mathrm{Fin,Top}}$ change. At the same T$_{\mathrm{FE}}$ value, $I_{\mathrm{OFF}}$ and $I_{\mathrm{ON}}$ decrease as W$_{\mathrm{Fin,Top}}$ decreases. This is because the reduced W$_{\mathrm{Fin,Top}}$ results in an increased parasitic resistance of the S/D regions in series, causing $I_{\mathrm{ON}}$ and $I_{\mathrm{OFF}}$ to decrease accordingly. This is validated by Fig. 11, which shows that the switch current ratio ($I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$) increases as W$_{\mathrm{Fin,Top}}$ decreases, causing a higher switching rate. This is because the trapezoidal fin has a stronger gate control ability over its middle area, and thus the reduction in $I_{\mathrm{ON}}$ is smaller than that in $I_{\mathrm{OFF}}$. As T$_{\mathrm{FE}}$ increases, $I_{\mathrm{OFF}}$ decreases and $I_{\mathrm{ON}}$ increases; hence, $I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$ increases accordingly. Moreover, it can be seen from Fig. 11 that as W$_{\mathrm{Fi}}$$_{\mathrm{n,Top}}$ decreases, the growing trend of $I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$ in the FinFET is relatively gentle. Meanwhile, $I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$ in the NC-FinFET displays obvious divergence; first, a rapid growth occurs, followed by a slow growth. This is because the NC effect exhibits different inhibition or enhancement effects on the surface potential and charge density in the depletion or accumulations ^[23]. The $I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$ achieved the peak value at W$_{\mathrm{Top,Fin}}$ = 4 nm and T$_{\mathrm{FE}}$ = 3 nm. This is because with a decrease in W$_{\mathrm{Fin,Top}}$, the downward trend of $I_{\mathrm{OFF}}$ becomes stable at T$_{\mathrm{FE}}$ = 3 nm, whereas $I_{\mathrm{ON}}$ decreases continuously owing to the influence of the parasitic resistance. As a result, $I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$ first increases and then decreases with a decrease in W$_{\mathrm{Fin,Top}}$.

As a significant aspect of the SCEs, within the subthreshold region, the barrier for the electrons in the source to channel is reduced, leading to a reduction in the threshold voltage ^[24]. Fig. 12 shows the DIBL variations with varying W$_{\mathrm{Fin,Top}}$. The value of DIBL decreases as W$_{\mathrm{Fin,Top}}$ decreases. The negative DIBL phenomenon appears in the NC-FinFET and becomes more obvious as T$_{\mathrm{FE}}$ increases ^[25,26]. As displayed in Fig. 13, the barrier height with W$_{\mathrm{Fin,Top}}$ = 2 nm was significantly higher than that with W$_{\mathrm{Fin,Top}}$ = 6 nm. With a decrease in W$_{\mathrm{Fin,Top}}$, the gap of the barrier height decreases between V$_{\mathrm{ds}}$ = 0.05 and 0.7 V. Thus, reducing W$_{\mathrm{Fin,Top}}$ can enhance the gate controllability to the channel and significantly improve the SCEs. As shown in Fig. 14, the barrier height increases with an increase in T$_{\mathrm{FE}}$ and V$_{\mathrm{ds}}$, leading to a negative DIBL phenomenon in the NC-FinFET.

As shown in Fig. 15, the SS decreases with a decrease in W$_{\mathrm{Fin,Top}}$. At the same W$_{\mathrm{Fin,Top}}$, the SS is further reduced to values of lower than 60 mV/dec with an increase in T$_{\mathrm{FE}}$, breaking the Boltzmann thermodynamic limit.

Fig. 3. Transfer characteristics of NC-FinFET with di-fferent W$_{\mathrm{Fin,Top}}$.

Fig. 4. Transfer characteristic curves of NC-FinFETs with different T$_{\mathrm{FE}}$.

Fig. 5. Threshold voltage variations with W$_{\mathrm{Fin,Top}}$ and T$_{\mathrm{FE}}$.

Fig. 6. Electron density distribution in (a) rectangular FinFET; (b) trapezoidal (W$_{\mathrm{Fin,Top}}$=3 nm) FinFET; (c) trapezoidal (W$_{\mathrm{Fin,Top}}$=3 nm) NC-FinFET.

Fig. 7. (a) Potential energy; (b) electrostatic potential along the channel for different top fin widths (W$_{\mathrm{Fin,Top}}$).

Fig. 8. (a) Potential energy; (b) electrostatic potential along the channel for varying T$_{\mathrm{FE}}$.

Fig. 9. $I_{\mathrm{OFF}}$ of devices for different values of T$_{\mathrm{FE}}$ and W$_{\mathrm{Fin,Top}}$.

Fig. 10. $I_{\mathrm{ON}}$ of devices for varying T$_{\mathrm{FE}}$ and W$_{\mathrm{Fin,Top}}$.

Fig. 11. $I_{\mathrm{ON}}$/$I_{\mathrm{OFF}}$ of devices for different values of T$_{\mathrm{FE}}$ and W$_{\mathrm{Fin,Top}}$.

Fig. 12. DIBL variation for varying W$_{\mathrm{Fin,Top}}$ and T$_{\mathrm{FE}}$.

Fig. 13. Potential profile along the channel for FinFET with different W$_{\mathrm{Fin,Top}}$ values.

Fig. 14. Potential profile along the channel for NC-FinFET with different values of T$_{\mathrm{FE}}$.

Fig. 15. Variation in SS for different W$_{\mathrm{Fin,Top}}$ and T$_{\mathrm{FE}}$ values.

V. CONCLUSIONS

In this study, we investigated the effects of the trapezoidal fin shape on the electrical characteristics of NC-FinFETs and compared the performance parameter variations for different top fin widths. It was concluded that as the top fin width decreases, both the on- and off-state currents decrease accordingly. However, the switch current ratio has been improved, which is conducive to improving the fast turn-off rate of the device and reducing the off-state power consumption. Changes in the top fin width affect the channel potential and potential energy. As the top fin width decreases, the threshold voltage increases. Simultaneously, the DIBL and SS are reduced by 60.9% and 7.2%, respectively, which effectively improves the SCE of the device. These findings can help better predict and evaluate variations in the device performance owing to the trapezoidal fin shape for NC-FinFETs at the early stage of an integrated circuit design and manufacturing.