| Title |
Single Phase Inverter High Frequency Circuit Modeling and Verification for Differential Mode Noise Analysis |
| Authors |
Ju-Hyun Shin ; Chhaya Seng ; Woo-Jung Kim ; Hanju Cha |
| DOI |
10.6113/TKPE.2021.26.3.176 |
| Keywords |
Differential mode noise; Q3D extractor; Parasitic impedance; High-frequency circuit model; EMI (Electromagnetic Interference) |
| Abstract |
This research proposes a high-frequency circuit that can accurately predict the differential mode noise of single-phase inverters at the circuit design stage. Proposed single-phase inverter high frequency circuit in the work is a form in which harmonic impedance components are added to the basic single-phase inverter circuit configuration. For accurate noise prediction, parasitic components present in each part of the differential noise path were extracted. Impedance was extracted using a network analyzer and Q3D in the measurement range of 150 kHz to 30 MHz. A high-frequency circuit model was completed by applying the measured values. Simulations and experiments were conducted to confirm the validity of the high-frequency circuit. As a result, we were able to predict the resonance point of the differential mode voltage extracted as an experimental value with a high-frequency circuit model within an approximately 10% error. Through this outcome, we could verify that differential mode noise can be accurately predicted using the proposed model of the high-frequency circuit without a separate test bench for noise measurement. |